9.27 Carrier to noise measurements as well as a measure of input sign...Figure 9.28 Noise‐figure verification device.Figure 9.29 Photo of the actual verification device.Figure 9.30 Signal flow diagram of a noise verification device.Figure 9.31 Signal flow diagram from computing the overall gain of the verif...Figure 9.32 Signal low diagram for noise power out under matched conditions....Figure 9.33 Relative noise power from the verification device.Figure 9.34 ADS simulation of the verification device.Figure 9.35 Comparing ADS simulation with analytic computation.Figure 9.36 Difference between ADS simulation and analytic computation.Figure 9.37 Measurement of NF verification device versus analytic computatio...Figure 9.38 NFA 4002 measurement compared to analytic computation.Figure 9.39 NFA 4000 measurement compared to analytic computation.
10 Chapter 10Figure 10.1 A 4‐port network used as a balanced amplifier.Figure 10.2 A 3‐port device used as a single‐ended to balanced device.Figure 10.3 A PC test board for characterizing differential lines.Figure 10.4 16 S‐parameters of a balanced transmission line.Figure 10.5 Comparing S 21, S 23, and S dd21.Figure 10.6 Display of all 16 mixed‐mode parameters, each mode is displayed ...Figure 10.7 Frequency domain (upper); time domain of Sdd11 and Scc11 (lower)...Figure 10.8 4‐port single‐ended S‐parameters of a differential device.Figure 10.9 Mixed‐mode parameters for a differential amplifier.Figure 10.10 A differential amplifier driven with a single‐ended signal.Figure 10.11 Example schematic of a differential amplifier.Figure 10.12 Driving an amplifier with true‐mode (upper) and single‐ended (l...Figure 10.13 An example case where the input is non‐linear and not‐different...Figure 10.14 Non‐linear non‐differential input driven with a true‐differenti...Figure 10.15 Amplifier with input clipping.Figure 10.16 Two‐tone response of a non‐linear differential amplifier.Figure 10.17 Block diagram of a 4‐port dual source VNA.Figure 10.18 Error in phase due to DUT mismatch.Figure 10.19 True mode vs. single‐ended measurements for differential S‐para...Figure 10.20 True‐mode vs. single‐ended measurements for common‐mode S‐param...Figure 10.21 Fixed‐frequency swept‐power measurement showing differential ga...Figure 10.22 Differential gain for a normal differential amplifier, measured...Figure 10.23 Swept power measurements of the mixed‐mode transmission paramet...Figure 10.24 Non‐linear magnitude and phase response of S dd21 for SE and tru...Figure 10.25 User interface for setting phase sweep.Figure 10.26 Phase‐skew test on a differential amplifier.Figure 10.27 Setup for differential harmonics.Figure 10.28 Gain, harmonic power, and THD of a differential amplifier.Figure 10.29 Output power, second and third harmonic versus input phase.Figure 10.30 Second harmonic response (upper), third harmonic repsonse (lowe...Figure 10.31 Swept power harmonics, with single‐ended and differential resul...Figure 10.32 Swept‐power harmonics (upper) and THD (lower).Figure 10.33 Examples of several RF transformers, baluns, and a hybrid.Figure 10.34 User interface to save mixed‐mode parameters to an S2P file.Figure 10.35 Measurement of SE to differential response from the difference ...Figure 10.36 Measurement of SE to common‐mode response from the sum port of ...Figure 10.37 Test setup for using hybrids to test differential parameters.Figure 10.38 Frequency response for differential parameters using de‐embeddi...Figure 10.39 Non‐linear response to a power sweep using hybrids to test S dd2...Figure 10.40 Swept‐frequency IMD measurements.Figure 10.41 Spectrum plot of IMD for a differential amplifier measured with...Figure 10.42 Swept‐power IMD measurement of a limiting differential amplifie...Figure 10.43 Measuring IMD on a normal differential amplifier, using hybrids...Figure 10.44 Measurement of IMD for a normal differential amplifier with SE ...Figure 10.45 The SE measurements of a limiting amplifier shows poor predicti...Figure 10.46 Block diagram for differential IMD with external sources.Figure 10.47 Frequency setup for differential IMD without baluns.Figure 10.48 Source setup for differential IMD.Figure 10.49 Differential IMD parameters.Figure 10.50 Swept‐frequency IMD power of a differential amplifier, measured...Figure 10.51 Amplifier with internal noise sources.Figure 10.52 Noise figure and gain, and DUTRNPI measurement for a differenti...Figure 10.53 Common mode gain and noise figure.Figure 10.54 Noise figure measured on single‐ended inputs.Figure 10.55 Differential noise parameters.
11 Chapter 11Figure 11.1 PC board designed for SMT part characterization.Figure 11.2 Analyzing the thru standard.Figure 11.3 Comparing the load connector to the thru connector.Figure 11.4 Comparing load connector soldering to thru connector.Figure 11.5 Thru measurements with and without ground solder.Figure 11.6 Difference between each end of the thru and the load connector....Figure 11.7 Measuring just the load by notch gating the connector.Figure 11.8 Residual load error from equivalent load.Figure 11.9 Open and short connector repeatability.Figure 11.10 Finding a model for the open and the short.Figure 11.11 Models versus measured for capacitance and inductance.Figure 11.12 Measurement of the thru after an unknown thru calibration.Figure 11.13 Measurement of a 100 Ω resistor connected shunt to ground.Figure 11.14 Model and measurements of shunt resistor.Figure 11.15 Signal flow diagram for a DUT in a fixture.Figure 11.16 Fixture flow graph for a unilateral DUT.Figure 11.17 Determining the phase of S 21.Figure 11.18 De‐embedding setup dialog allowing arbitrary port selection.Figure 11.19 Port extension dialog including loss and waveguide compensation...Figure 11.20 Automatic port extension setup.Figure 11.21 Measurement of an open and shorted fixture (upper); after autom...Figure 11.22 S 11 response after APE with and without mismatch compensation....Figure 11.23 Measurement of a shunt 10 pF capacitor; as measured in the fixt...Figure 11.24 Complete measurement of a shunt 10 pF capacitance with APE.Figure 11.25 Time‐domain transmission response of a fixture.Figure 11.26 Time‐domain response (gray, T11) and gated response (black, T11...Figure 11.27 Frequency response of the thru (S11_FixThru, narrow light trace...Figure 11.28 Computed value for S 22 of the fixture (S22A) and actual fixture...Figure 11.29 Computed value of S 21 (S21A_AFR) and actual fixture S 21 (S21_Fi...Figure 11.30 Filter measurement comparing the actual filter, filter in a fix...Figure 11.31 Using AFR to compute PC board input and output fixtures.Figure 11.32 Comparing AFR measurement with in‐fixture cal standards.Figure 11.33 AFR with DUT fixture compensation.Figure 11.34 One‐port AFR with a short and an open standard used.Figure 11.35 Signal flow for an anti‐network.Figure 11.36 Representation of a DUT with input and output port matching, be...Figure 11.37 S‐parameters of an ideal transformer.Figure 11.38 Attenuator S 11 and S 21 (upper); de‐embedding the attenuator (mi...Figure 11.39 S‐parameter of a filter (upper); after normal de‐embedding (mid...Figure 11.40 Stability in S 21 of a metrology cable and a flexible braded cab...Figure 11.41 Directivity stability of a metrology cable with a load (dark); ...Figure 11.42 Source match stability of a metrology cable (dark), stability o...Figure 11.43 Reflection tracking phase stability of a metrology cable and a ...
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