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Industry 4.1


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Functional‐block diagram of the holonic supply‐chain system.

      Source: Reprinted with permission from Ref. [14]; © 2010 IEEE.

      1.2.1.3 Equipment Engineering System (EES)

      The EES is defined as the physical implementation of the equipment engineering capabilities (EECs), which are applications that address specific areas of equipment engineering (EE), such as fault detection and classification (FDC), predictive maintenance (PdM), virtual metrology (VM), run‐to‐run (R2R) control, etc. [4, 5].

Schematic illustration of the ISMT EES framework.

      Source: Reprinted with permission from Ref. [14]; © 2010 IEEE.

      As displayed in Figure 1.8, the ISMT EES framework posits all the EE applications (such as advanced process control (APC), OEE, FDC, PdM, VM, and others) outside the equipment. Those architectures are suitable for the applications of R2R‐type controls involving more than one piece of equipment. However, for self‐related equipment applications (e.g. FDC, PdM, and VM), such architectures heavily consume factory network bandwidth. Another disadvantage of those architectures is that all the data are sent to the same remote client for processing and monitoring, which may result in data overloading to the remote client and further impact the real‐time analysis efficiency. Additionally, if the remote client breaks down and lacks backup, the entire prognostics system is paralyzed [5].

Schematic illustration of the proposed EES framework.

      Source: Reprinted with permission from Ref. [14]; © 2010 IEEE.

      Among the abovementioned EES applications, VM is an emerging technology [26]. VM is a method to conjecture the manufacturing quality of a process tool based on the data sensed from the process tool and without physical metrology operation [27].

      Fab‐wide R2R control [28] is one of essential EES applications for semiconductor manufacturing. In general, a run can be a batch, lot, or an individual wafer. When lot‐to‐lot (L2L) control is applied, the promptness of each wafer’s VM result for the feedback and feedforward purposes will not be necessary. However, when wafer‐to‐wafer (W2W) control is adopted, obtaining the real‐time and on‐line VM result of each wafer in the feedback loop is essential.

      1.2.1.4 Engineering Chain (EC)

Schematic illustration of comparison of SC and EC.

      Source: Reprinted with permission from Ref. [14]; © 2010 IEEE.

      The novel EC component and the traditional SC component for inter‐company operation are combined with the intra‐company MES component and EES component to create a new comprehensive e‐Manufacturing scope in the semiconductor industry as illustrated in Figure 1.2. The proposed semiconductor e‐Manufacturing concept focuses not only on the SC O2D for timely and economical delivery of desired products [6, 7] but also on the e‐Manufacturing support to achieve a faster design cycle for reducing the EC T2M since some IC design cycles are longer than their corresponding mass‐production cycles [29].

      Cheng et al. [11] also proposed the concept of an engineering‐chain‐management system (ECMS) to supervise the collaborations with EC partners and EC capabilities for shortening the T2M in the IC production process. An EC environment consists of numerous design partners that are allocated among different locations but working together to produce advanced IC design. Therefore, considerable engineering data exchange is inevitable. Each professional partner of the EC focuses on its professional work. The ECMS can support the operating efficiency of the collaborative team, including first design success rate enhancement, design cycle time subtraction, and design cost reduction. The ECMS supports the EC operation and engineering data exchange by providing a new system framework and comprehensive operating scenarios.

      Coherent IC design operations among many heterogeneous companies are the operating model of the EC. Enormous quantities of data, including design files, mask data, process specifications, and yield data, need to be exchanged among all the members of the EC. Therefore, transparent information sharing is essential for significant design efficiency improvement and to assure the first‐pass tape out of an IC design.

      To support the above EC operating scenarios in the ECMS architecture requires exchanging considerable engineering data. Although, there is no industrial standard for EC engineering‐data exchange as that for logistics data in the semiconductor industry, an ECMS framework is required to implement and fulfill the key requirements of the EC [9].